Unified model for ZVS DC-DC converters with active clamp

N Lakshminarasamma, and V Ramanarayanan


Active-clamp DC-DC converters belong to the family of two-switch pulse-width modulated converters featuring zero-voltage switching. The topological structure of these converters in relation to their hard-switched PWM converters is highlighted. With proper designation of the circuit variables (throw current I and the pole voltage V), all these converters are seen to be governed by an identical set of equations. In this framework, these circuits exhibit 6 subperiods per cycle with identical current waveform in the resonant inductor. With idealized switches, steadystate performance is obtainable in an analytical form. This set of equations may be solved through a simple spreadsheet programme, which provides a design constraint on the normalized current. A generalized equivalent circuit emerges for all these converters from this steady-state conversion ratio. It also provides a dynamic model as well. The circuit model proposed in this paper enables one to use familiar state-space averaged results of the standard PWM DC-DC converters (steady-state and dynamic) for their ZVS active-clamp counterparts. With these equivalent circuits, small-signal analysis of these converters is akin to that of hard-switched converters. As an extension of the work, a unified dynamic model for ZVS active-clamp converters is proposed in this paper. Small-signal transfer functions like audio-suceptibility, control gain, output impedance, input admittance of buck, boost, buck-boost active-clamp converters are derived. Simulation and experimental results showing the steadystate and dynamic performance of these family of converters are presented.


Active clamp; zero-voltage switching; steady-state model; dynamic model

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